What are two ways to remember the current state of a counter in VHDL?A) With FUNCTIONS and PROCESSB) With counters and timersC) With SIGNAL and VARIABLED) With bit types

What are two ways to remember the current state of a counter in VHDL?

A) With FUNCTIONS and PROCESS

B) With counters and timers

C) With SIGNAL and VARIABLE

D) With bit types